Description:
Elementary questions about electronics.
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AC coupled offset and gain problem
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I am having trouble understanding the behavior of a circuit I am using to apply gain and offset to a triangle wave. The circuit in question is here: [link] My triangle wave output is 4 +/- 1.6 V, and I want 2.55 +/- 2.45 V out of the gain stage. (0.1 - 5 Vpp)... more »
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How delicate is the output of a CMOS IC?
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Are standard CMOS logic ICs any more susceptible to damage from external causes than BJT devices via the OUTput terminals? By external causes, I mean things like ESD or a mild leakage current from the mains supply. As an example, suppose an output from a 4000 series logic gate is intended to drive an external load, but may be left open at... more »
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